0 Replies Latest reply: Sep 7, 2010 12:47 AM by 807576 RSS

    OpenSPARC T1 Hard Ethernet Core

    807576
      Hi,

      I am new to working with FPGAs and am trying to implement OpenSPARC T1 on a Virtex 5 board (XUPV5-LL110T).

      I am using Xilinx Design Suite 12.2, and am encountering some errors in the system.ucf file:

      ConstraintSystem:58 - Constraint <NET "&#42;/tx_client_clk&#42;" TNM_NET = "clk_client_tx0";> [system.ucf(326)]: NET "&#42;/tx_client_clk&#42;" does not match any design objects.
      ConstraintSystem:58 - Constraint <NET "&#42;/rx_client_clk&#42;" TNM_NET = "clk_client_rx0";> [system.ucf(331)]: NET "&#42;/rx_client_clk&#42;" does not match any design objects.
      ConstraintSystem:58 - Constraint <NET "&#42;/tx_gmii_mii_clk&#42;" TNM_NET = "clk_phy_tx0";> [system.ucf(336)]: NET "&#42;/tx_gmii_mii_clk&#42;" does not match any design objects.

      I checked the mpd for the hard ethernet core and found that those don't appear in version 2.03a of the core, but did exist in 2.01b.

      I suspect tx_client_clk and rx_client_clk were changed to TxClientClk and RxClientClk in the newer version of the mpd. Please correct me if I am mistaken. I am not sure what tx_gmii_mii_clk may have been changed to. Is there some documentation that might direct me to these changes?

      Any help or direction would be greatly appreciated.

      Thank you.