5 Replies Latest reply on Jun 30, 2010 11:58 PM by 807576

    Register file access pattern

    807576
      I have redesigned the T1 IRF for FPGA to reduce its area (25% logic and 15% registers for four-thread core). It is able to boot the OBP, but hangs in Linux. Does anybody know is there some instruction sequences that cause unusual access patterns to IRF?