I have redesigned the T1 IRF for FPGA to reduce its area (25% logic and 15% registers for four-thread core). It is able to boot the OBP, but hangs in Linux. Does anybody know is there some instruction sequences that cause unusual access patterns to IRF?
You may see it exaclty using SVN client. The bw_r_irf_fpga1.v is all new, as is the underlying regfile_1w_4r.v. At last, execution unit, rml and cwp are modified (current cwp is wired from rml to bw_r_irf_fpga1).